TI introduces first multiprotocol gigabit TSN-enabled processors

By OEM Update Editorial November 13, 2018 3:35 pm IST

Texas Instruments (TI) has announced the industry’s first multiprotocol gigabit (Gb) time-sensitive networking (TSN)-enabled processor family. The new, highly integrated Sitara AM6x processor family provides industrial-grade reliability, with quad and dual Arm Cortex-A53 core variants built to meet the rapidly evolving needs of Industry 4.0 in factory automation, motor drives and grid infrastructure.

By supporting gigabit throughput rates for TSN standards and other industrial protocols in a specific subsystem, Sitara AM6x processors are built for the convergence of both Ethernet and real-time data traffic on a single network. This capability is critical for real-time communication in Industry 4.0 applications and enables software-reconfigurable cyber physical systems in factories.

The inclusion of an on-chip isolated dual-core microcontroller (MCU) subsystem enables designers to use AM6x processors to create more dependable and functional safety-certifiable products, while reducing overall system-level complexity for applications including programmable logic controllers (PLC) and multi-axis motor drives. Comprehensive support for error-correcting-code (ECC) memory protection for both on-chip memory and external DDR memory and for 1,00,000 power-on hours (PoH) at a 105C junction temperature (TJ) operation enable AM6x processors to perform in high-reliability applications. This processor family allows developers to scale their designs to fit the needs of their system with pin-compatible processors that operate with a unified software platform.

Key features and benefits of AM6x processors
Optimised for industrial networking: New gigabit industrial communications subsystem (PRU-ICSS-Gb) supports multiple industrial ethernet protocols including TSN, EtherCAT, Ethernet/IP and PROFINET and provides the flexibility to support the evolving needs of industrial communication.

Integrated features enabling functional safety: On-chip isolated dual-core Arm Cortex-R5F central processing unit (CPU)-based MCU subsystem that can operate in an optional lockstep mode, diagnostic libraries and ECC memory protection help enable functional safety subsystems

Enhanced on-chip security: Secure boot, secure storage and smart crypto engines enable enhanced system security
Integrated 3D graphics and display: Enables HMI and Industrial PC applications

Unified software platform: Supported by the Processor SDK, customers can seamlessly reuse and migrate Android, Linux and TI-RTOS software across TI processor families

Simplifying system complexity: Integrated subsystems, streamlined power sequencing, integrated low-dropout regulators and pin-to-pin compatibility enable hardware reuse across platforms and reduce system complexity and cost.